HDL语言及源代码
图8-1 8-3编码器
表8-1 8-3优先编码器真值表
输入
|
输出
|
||||||||||||
EIN
|
0N
|
1N
|
2N
|
3N
|
4N
|
5N
|
6N
|
7N
|
A2N
|
A1N
|
A0N
|
GSN
|
EON
|
1
|
X
|
X
|
X
|
X
|
X
|
X
|
X
|
X
|
1
|
1
|
1
|
1
|
1
|
0
|
1
|
1
|
1
|
1
|
1
|
1
|
1
|
1
|
1
|
1
|
1
|
1
|
0
|
0
|
X
|
X
|
X
|
X
|
X
|
X
|
X
|
0
|
0
|
0
|
0
|
0
|
1
|
0
|
X
|
X
|
X
|
X
|
X
|
X
|
0
|
1
|
0
|
0
|
1
|
0
|
1
|
0
|
X
|
X
|
X
|
X
|
X
|
0
|
1
|
1
|
0
|
1
|
0
|
0
|
1
|
0
|
X
|
X
|
X
|
X
|
0
|
1
|
1
|
1
|
0
|
1
|
1
|
0
|
1
|
0
|
X
|
X
|
X
|
0
|
1
|
1
|
1
|
1
|
1
|
0
|
0
|
0
|
1
|
0
|
X
|
X
|
0
|
1
|
1
|
1
|
1
|
1
|
1
|
0
|
1
|
0
|
1
|
0
|
X
|
0
|
1
|
1
|
1
|
1
|
1
|
1
|
1
|
1
|
0
|
0
|
1
|
0
|
0
|
1
|
1
|
1
|
1
|
1
|
1
|
1
|
1
|
1
|
1
|
0
|
1
|
整个编码器的VHDL语言描述如下:
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY ENCODE IS
PORT(D: IN STD_LOGIC_VECTOR(7 DOWNTO 0);
EIN: IN STD_LOGIC;
A0N,A1N,A2N,GSN,EON: OUT STD_LOGIC);
END ENCODE;
ARCHITECTURE A OF ENCODE IS
SIGNAL Q: STD_LOGIC_VECTOR(2 DOWNTO 0);
BEGIN
A0N <=Q(0); A1N<=Q(1); A2N<=Q(2);
PROCESS(D)
BEGIN
IF EIN =’1’ THEN
Q<=”111”;
GSN<=’1’; EON<=’1’;
ELSIF D(0)=’0’ THEN
Q<=”111”; GSN<=’0’; EON<=’1’;
ELSIF D(1)=’0’ THEN
Q<=”110”; GSN<=’0’; EON<=’1’;
ELSIF D(2)=’0’ THEN
Q<=”101”; GSN<=’0’; EON<=’1’;
ELSIF D(3)=’0’ THEN
Q<=”100”; GSN<=’0’; EON<=’1’;
ELSIF D(4)=’0’ THEN
Q<=”011”; GSN<=’0’; EON<=’1’;
ELSIF D(5)=’0’ THEN
Q<=”010”; GSN<=’0’; EON<=’1’;
ELSIF D(6)=’0’ THEN
Q<=”001”; GSN<=’0’; EON<=’1’;
ELSIF D(7)=’0’ THEN
Q<=”000”; GSN<=’0’; EON<=’1’;
ELSIF D=”11111111” THEN
Q<=”111”; GSN<=’1’; EON<=’0’;
END IF;
END PROCESS;
END A;
五 实验步骤
1 请参考以上程序,编程实现设一个16-4优先编码器。
2 将编辑好的电路进行编译和仿真。
3输入信号接实验箱的拨码开关,输出信号接发光二极管。改变拨码开关的状态,观察实验结果。
4将ByteBlaster电缆的一端与计算机的并行口相连,另一端10针阴头与实验板的插座相连。
5 选择菜单命令Options/Hardware Setup,出现图3-67所示设置编程硬件对话框。在Hardware Type栏的下拉条中选择Byte Blaster;
6 单击Configure按钮,即开始配置器件。若器件或电缆或电源有问题,则会产生错误警告信息。
六 记录实验结果并完成实验报告
记录实验结果并完成实验报告。对16-4优先编码器造表,得到其真值表,并分析其运算结果的正确性。
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