简单PLD
DS33Z11/DS33Z44 EEPROM编程指南
摘要:Dallas Semiconductor的以太网链接及传输处理芯片(ELITE)产品线在广域网(WAN)与局域网(LAN)之间构建了一个桥梁。ELITE有几种配置方法,最常用的一种是通过微处理器(µP)控制。此外,为了降低成本,芯片还提供了硬件配置模式或外部EEPROM配置模式。对于硬件配置模式,由于芯片引脚数有限,有些功能的配置会受到限制;而EEPROM配置模式,可对芯片的每个寄存器进行配置,功能配置不受限制。本篇应用笔记针对DS33Z11或DS33Z44的EEPROM配置模式,介绍如何编写它们的EEPROM配置软件。Functional Block Address | Address Range for EEPROM Data (Hexadecimal) |
Global registers | 000 to 03F |
Arbiter registers | 040 to 07F |
BERT registers | 080 to 0BF |
Serial interface Tx registers | 0C0 to 0FF |
Serial interface Rx registers | 100 to 13F |
Ethernet interface registers | 140 to 17F |
MAC register write 1 (MAC control) | 180 to 186 (7-byte record for MAC indirect write) |
MAC register write 2 (MII data) | 187 to 18D (7-byte record for MAC indirect write) |
MAC register write 3 (MII address) | 18E to 194 (7-byte record for MAC indirect write) |
MAC register write 4 (flow control) | 195 to 19B (7-byte record for MAC indirect write) |
Functional Block Address | Address Range for EEPROM Data (Hexadecimal) |
Global registers | 000 to 03F |
Arbiter registers | 040 to 07F |
BERT registers | 080 to 0BF |
Serial interface 1 Tx registers | 0C0 to 0FF |
Serial interface 1 Rx registers | 100 to 13F |
Ethernet interface 1 registers | 140 to 17F |
Serial interface 2 Tx registers | 180 to 1BF |
Serial interface 2 Rx registers | 1C0 to 1FF |
Ethernet interface 2 registers | 200 to 23F |
Serial interface 3 Tx registers | 240 to 27F |
Serial interface 3 Rx registers | 280 to 2BF |
Ethernet interface 3 registers | 2C0 to 2FF |
Serial interface 4 Tx registers | 300 to 33F |
Serial interface 4 Rx registers | 340 to 37F |
Ethernet interface 4 registers | 380 to 3BF |
MAC 1 register write 1 (MAC control) | 3C0 to 3C6 (7-byte record for MAC indirect write) |
MAC 1 register write 2 (MII data) | 3C7 to 3CD (7-byte record for MAC indirect write) |
MAC 1 register write 3 (MII address) | 3CE to 3D4 (7-byte record for MAC indirect write) |
MAC 1 register write 4 (flow control) | 3D5 to 3DB (7-byte record for MAC indirect write) |
MAC 2 register write 1 (MAC control) | 3DC to 3E2 (7-byte record for MAC indirect write) |
MAC 2 register write 4 (flow control) | 3E3 to 3E9 (7-byte record for MAC indirect write) |
MAC 3 register write 1 (MAC control) | 3EA to 3F0 (7-byte record for MAC indirect write) |
MAC 3 register write 4 (flow control) | 3F1 to 3F6 (7-byte record for MAC indirect write) |
MAC 4 register write 1 (MAC control) | 3F7 to 3FD (7-byte record for MAC indirect write) |
MAC 4 register write 4 (flow control) | 3FE to 404 (7-byte record for MAC indirect write) |
EEPROM 7-Byte Record | EEPROM Address Base from Table 1 (Hexadecimal) | EEPROM Address (Hexadecimal) | MAC Register Write 1 Used to Initialize SU.MACCR (Hexadecimal) |
MAC data byte 1 | Base + 00 | 180 | 0C - written to SU.MACWD0 |
MAC data byte 2 | Base + 01 | 181 | 00 - written to SU.MACWD1 |
MAC data byte 3 | Base + 02 | 182 | 18 - written to SU.MACWD2 |
MAC data byte 4 | Base + 03 | 183 | 10 - written to SU.MACWD3 |
MAC address low | Base + 04 | 184 | 00 - written to SU.MACAWL |
MAC address high | Base + 05 | 185 | 00 - written to SU.MACAWH |
MAC write command | Base + 06 | 186 | 01 - written to SU.MACRWC |
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