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本文来源电子发烧友社区,作者:yjp, 帖子地址:
https://bbs.elecfans.com/jishu_2293868_1_1.html看手册,如何配置PWM,代码如下void HRPWM1_config(uint16 period){ /影子寄存器的立即装载/ EPwm1Regs.TBCTL.bit.PRDLD = TB_IMMEDIATE; /PWM周期值向上计数时为TBCLK+1个TBCLK,period-1表示其周期值与实际周期数相等/ EPwm1Regs.TBPRD = period - 1;/*CC比较寄存器的占空比配置*//*HRPWM占空比初始值设置:整数部分*/EPwm1Regs.CMPA.half.CMPA = period / 2;/*HRPWM占空比初始值设置常规PWM占空比右移8位,扩展16位精度为24位*/EPwm1Regs.CMPAM.half.CMPAHR = 1 << 8;EPwm1Regs.CMPB = period / 2;/*EPWM1的相位无偏移*/EPwm1Regs.TBPHS.half.TBPHS = 0;/*TB时基计数初始值从0开始计数*/EPwm1Regs.TBCTR = 0;/*仿真模式时,时基计数器自由运行*/EPwm1Regs.TBCTL.bit.FREE_SOFT = 3;/*时基计数器向上计数*/EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;/*禁止装载相位*/EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;/*不产生同步事件*/EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;/*时基计数器高速时钟与低速时钟采用1分频*/EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;/*在CTR=0时装载影子寄存器的值*/EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;/*CC比较寄存器采用影子寄存器模式*/EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;/*在CTR=0时EPWMxA清零*/EPwm1Regs.AQCTLA.bit.ZRO = AQ_CLEAR;/*EPWMxA向上计数时当CTR=CMPA时EPWMxA置位*/EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;/*当CTR=0时EPWMxB清零*/EPwm1Regs.AQCTLB.bit.ZRO = AQ_CLEAR;/*EPWMxB向上计数时当CTR=CMPB时EPWMxB置位*/EPwm1Regs.AQCTLB.bit.CBU = AQ_SET;/*事件中断配置*//*从CTR=0处开始执行事件中断*/EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;/*ET事件中断INT使能*/EPwm1Regs.ETSEL.bit.INTEN = 1;/*ET中断事件次数配置:一中断周期内执行3个事件*/EPwm1Regs.ETPS.bit.INTPRD = ET_3RD;EALLOW;/*使能生成,占空比调节*/EPwm1Regs.HRPCTL.bit.HRPE = 1;/*相位调节屏蔽*/EPwm1Regs.HRPCTL.bit.TBPHSHRLOADE = 0;/*MEP校准作用在上升沿,占空比控制模式*/EPwm1Regs.HRCNFG.all = 0x0;EPwm1Regs.HRCNFG.bit.EDGMODE = HR_REP;EPwm1Regs.HRCNFG.bit.CTLMODE = HR_CMP;/*自CTR=0开始装载高频CMPAHR寄存器的值*/EPwm1Regs.HRCNFG.bit.HRLOAD = HR_CTR_ZERO;/*使能自动校准延迟功能*/EPwm1Regs.HRCNFG.bit.AUTOCONV = 1;/*自动延迟校准延迟数设置为1*/EPwm1Regs.HRMSTEP = 0x00FC;EDIS;}再中断服务函数如下/********************** 函数名:EPWM2_ISR(void) 参 数:无 返回值:无 作 用:EPWM2事件中断:产生占空比从1到256变化的常规PWM波形 **********************/void INTERRUPT EPWM2_ISR(void){ for(DutyFine=1;DutyFine<256;DutyFine++) { EPwm2Regs.CMPA.half.CMPA=DutyFine; }EPwm2Regs.ETCLR.bit.INT=1;PieCtrlRegs.PIEACK.all=PIEACK_GROUP3;}
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