8
存储器
8.5 外部存储器
RA6 MCU包含用于连接到外部存储器和器件的外部数据总线。某些产品还包括一个内置的SDRAM控制器,可通过该控制器使用最高达128MB的外部SDRAM。八个可编程片选提供了许多选项,可以在每个片选上设置这些选项,以允许连接到各种外部器件。存储器映射的外部片选区域地址从0x60000000开始。有关更多详细信息,请参见《硬件用户手册》。
8.5.1 使用外部16位存储器器件
连接具有字节选择线的外部16位存储器器件时,将MCU的A1连接到存储器的A0,将MCU的A0连接到字节选择线。
8.5.2 SDRAM初始化示例
Renesas FSP提供了采用CMSIS数据结构的C语言头文件,此文件映射了所有外部总线控制寄存器。以下函数是在Renesas FSP中使用CMSIS寄存器结构初始化SDRAM存储器控制器的示例。
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void bsp_sdram_init (void)
{
/** Delay at least 100uS after SDCLK active */
R_BSP_SoftwareDelay(100U, BSP_DELAY_UNITS_MICROSECONDS);
/** Setting for SDRAM initialization sequence */
R_BUS->SDRAM.SDIR_b.PRC = 3U;
R_BUS->SDRAM.SSDIR_b.PRC = BSP_PRV_SDRAM_TRP - 3U;
while(R_BUS->SDRAM.SDSR)
{
/* According to h/w maual, need to confirm that all the status bits in SDSR are 0 before SDIR modification. */
}
R_BUS->SDRAM.SDIR_b.ARFC = BSP_PRV_SDRAM_SDIR_REF_TIMES;
while(R_BUS->SDRAM.SDSR)
{
/* According to h/w maual, need to confirm that all the status bits in SDSR are 0 before SDIR modification. */
}
R_BUS->SDRAM.SDIR_b.ARFI = 0U;
R_BUS->SDRAM.SDIR_b.ARFI = BSP_PRV_SDRAM_TRFC - 3U;
while(R_BUS->SDRAM.SDSR)
{
/* According to h/w maual, need to confirm that all the status bits in SDSR are 0 before SDICR modification. */
}
/** Start SDRAM initialization sequence.
* Following operation is automatically done when set SDICR.INIRQ bit.
* Perform a PRECHARGE ALL command and wait at least tRP time.
* Issue an AUTO REFRESH command and wait at least tRFC time.
* Issue an AUTO REFRESH command and wait at least tRFC time.
*/
R_BUS->SDRAM.SDICR_b.INIRQ = 1U;
while(R_BUS->SDRAM.SDSR_b.INIST)
{
/* Wait the end of initialization sequence. */
}
/** Setting for SDRAM controller */
R_BUS->SDRAM.SDCCR_b.BSIZE = BSP_PRV_SDRAM_BUS_WIDTH; /* set SDRAM bus width */
R_BUS->SDRAM.SDAMOD_b.BE = BSP_PRV_SDRAM_CONTINUOUS_ACCESSMODE; /* enable continuous access */
R_BUS->SDRAM.SDCMOD_b.EMODE = BSP_PRV_SDRAM_ENDIAN_MODE; /* set endian mode for SDRAM address space */
while(R_BUS->SDRAM.SDSR)
{
/* According to h/w maual, need to confirm that all the status bits in SDSR are 0 before SDMOD modification. */
}
/** Using LMR command, program the mode register */
R_BUS->SDRAM.SDMOD = ((((uint16_t)(BSP_PRV_SDRAM_MR_WB_SINGLE_LOC_ACC << 9)
|(uint16_t)(BSP_PRV_SDRAM_MR_OP_MODE << 7))
|(uint16_t)(BSP_PRV_SDRAM_CL << 4))
|(uint16_t)(BSP_PRV_SDRAM_MR_BT_SEQUENCTIAL << 3))
|(uint16_t)(BSP_PRV_SDRAM_MR_BURST_LENGTH << 0);
/** wait at least tMRD time */
while(R_BUS-
>SDRAM.SDSR_b.MRSST)
{
/* Wait until Mode Register setting done. */
}
/** Set timing parameters for SDRAM */
R_BUS->SDRAM.SDTR_b.RAS = BSP_PRV_SDRAM_TRAS - 1U; /* set ACTIVE-to-PRECHARGE command cycles*/
R_BUS->SDRAM.SDTR_b.RCD = BSP_PRV_SDRAM_TRCD - 1U; /* set ACTIVEto READ/WRITE delay cycles */
R_BUS->SDRAM.SDTR_b.RP = BSP_PRV_SDRAM_TRP - 1U; /* set PRECHARGE command period cycles */
R_BUS->SDRAM.SDTR_b.WR = BSP_PRV_SDRAM_TWR - 1U; /* set write recovery cycles */
R_BUS->SDRAM.SDTR_b.CL = BSP_PRV_SDRAM_CL; /* set SDRAM column latency cycles */
/** Set row address offset for target SDRAM */
R_BUS->SDRAM.SDADR_b.MXC = BSP_PRV_SDRAM_SDADR_ROW_ADDR_OFFSET - 8U;
R_BUS->SDRAM.SDRFCR_b.REFW = (uint16_t)(BSP_PRV_SDRAM_TRFC - 1U); /* set Auto-Refresh issuing cycle */
R_BUS->SDRAM.SDRFCR_b.RFC = BSP_PRV_SDRAM_REF_CMD_INTERVAL - 1U; /* set Auto-Refresh period */
/** Start Auto-refresh */
R_BUS->SDRAM.SDRFEN_b.RFEN = 1U;
/** Enable SDRAM access */
R_BUS->SDRAM.SDCCR_b.EXENB = 1U;
}
8.6 数据对齐
没有对齐数据方面的限制。MCU能够对奇数存储地址执行字节、字和长整型访问。虽然对齐数据访问仍然是最佳选择,但并不是必须的。
8.7 字节顺序限制
存储器空间必须采用小尾数法才能在Cortex-M内核上执行代码。
下一章:寄存器写保护
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