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GD32F30x系列固件库
Kelly Yang
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/*！
\file readme.txt
\brief description of the ADC0_ADC1_regular_parallel example
*/
/*
Copyright （C） 2017 GigaDevice
2017-02-10， V1.0.0， firmware for GD32F30x
*/
This demo is based on the GD32F30x-EVAL board， it shows how to
use ADC0 and ADC1 regular_parallel convert function. PA3 and PA0 are
configured in AIN mode. TIMER1_CH1 is the trigger source of ADC0. ADC1
external trigger chooses none. When the rising edge of TIMER1_CH1 coming，
ADC0 and ADC1 regular channels are triggered at the same time. The values
of ADC0 and ADC1 are transmit to array adc_value［］ by DMA.
We can watch array adc_value［］ in debug mode.
The ADC1 clock should below 42MHz.
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addmark
2022-06-14
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zeshou
2018-03-02
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