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ADP5037双3兆赫800毫安降压两个300毫安LDO稳压器

消耗积分:0 | 格式:rar | 大小:0.78 MB | 2017-10-27

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  The ADP5037 combines two high performance buck regulators and two low dropout (LDO) regulators in a small, 24-lead 4 mm × 4 mm LFCSP to meet demanding performance and board space requirements. The high switching frequency of the buck regulators enables tiny multilayer external components and minimizes the board space. When the MODE pin is set high, the buck regulators operate in forced PWM mode. When the MODE pin is set low and the load is above a predefined threshold, the buck regulators operate in PWM mode. When the load current falls below a predefined threshold, the regulator operates in power save mode (PSM), improving the light-load efficiency.
ADP5037双3兆赫800毫安降压两个300毫安LDO稳压器

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