数据：
Wideband, Low Noise, Low Distortion, Fully Differential Amplifier 数据表 
THS4520是一款宽带全差分运算放大器，专为5 V数据采集系统而设计。它在2 nV /
加载时具有非常低的噪音。压摆率为570 V /μs，建立时间为7 ns至0.1％（2 V步进），是数据采集应用的理想选择。它专为单位增益稳定性而设计。
为了实现与ADC的直流耦合，其独特的输出共模控制电路可将输出共模电压维持在与设定电压相差0.25 mV（典型值）的范围内。共模设定点默认为内部电路的中间电源，可能会从外部电源过驱动。
输入和输出经过优化，可将共模电压设置为中间电源，从而获得最佳性能。除了在低电源电压下的高性能外，还可提供极高性能的单电源5 V和3.3 V数据采集系统。
THS4520采用四通道16引脚无引脚QFN封装（ RGT），工作温度范围为40°C至85°C。
Hz （f> 10 kHz）
| Architecture |
| Number of Channels (#) |
| Total Supply Voltage (Min) (+5V=5, +/-5V=10) |
| Total Supply Voltage (Max) (+5V=5, +/-5V=10) |
| BW @ Acl (MHz) |
| Acl, min spec gain (V/V) |
| Slew Rate (Typ) (V/us) |
| Vn at Flatband (Typ) (nV/rtHz) |
| Vn at 1kHz (Typ) (nV/rtHz) |
| Iq per channel (Typ) (mA) |
| Vos (Offset Voltage @ 25C) (Max) (mV) |
| Rail-to-Rail |
| Features |
| Rating |
| Operating Temperature Range (C) |
| Package Group |
| Package Size: mm2:W x L (PKG) |
| CMRR (Typ) (dB) |
| Input Bias Current (Max) (pA) |
| Offset Drift (Typ) (uV/C) |
| GBW (Typ) (MHz) |
| Output Current (Typ) (mA) |
| 2nd Harmonic (dBc) |
| 3rd Harmonic (dBc) |
| @ MHz |
| THS4520 | THS4120 | THS4121 |
|---|---|---|
| Voltage FB | CMOS Fully Differential Voltage FB | CMOS Fully Differential Voltage FB |
| 1 | 1 | 1 |
| 3 | 3 | 3 |
| 5.25 | 3.5 | 3.5 |
| 620 | 100 | 100 |
| 1 | 1 | 1 |
| 570 | 55 | 55 |
| 2 | 5.4 | 5.4 |
| 2 | 16 | 16 |
| 14.2 | 11 | 11 |
| 2.5 | 8 | 8 |
| Out | In to V+ Out | In to V+ Out |
| Shutdown | Shutdown | N/A |
| Catalog | Catalog | Catalog |
| -40 to 85 | -40 to 85 0 to 70 | -40 to 85 0 to 70 |
| VQFN | MSOP-PowerPAD SOIC VSSOP | MSOP-PowerPAD SOIC VSSOP |
| 16VQFN: 9 mm2: 3 x 3(VQFN) | 8MSOP-PowerPAD: 15 mm2: 4.9 x 3(MSOP-PowerPAD) 8SOIC: 29 mm2: 6 x 4.9(SOIC) 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8MSOP-PowerPAD: 15 mm2: 4.9 x 3(MSOP-PowerPAD) 8SOIC: 29 mm2: 6 x 4.9(SOIC) 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) |
| 84 | 96 | 96 |
| 10000000 | 1.2 | 1.2 |
| 1 | 25 | 25 |
| 1200 | 100 | 100 |
| 105 | 25 | 25 |
| 115 | 79 | 79 |
| 123 | 93 | 93 |
| 0.1 | 1 | 1 |
收藏
评论(0)