| Sample rate (Max) (MSPS) | 1600, 3200 |
| Resolution (Bits) | 12 |
| Number of input channels | 2, 1 |
| Interface type | Parallel LVDS |
| Analog input BW (MHz) | 2800 |
| Features | Ultra High Speed |
| Rating | Catalog |
| Input range (Vp-p) | 0.8 |
| Power consumption (Typ) (mW) | 3880 |
| Architecture | Folding Interpolating |
| SNR (dB) | 58.5 |
| ENOB (Bits) | 9.4 |
| SFDR (dB) | 71 |
| Operating temperature range (C) | -40 to 85 |
| Input buffer | Yes |
- Configurable to Either 2.0/3.2 GSPS Interleaved
or 1.0/1.6 GSPS Dual ADC - Pin-Compatible With ADC10D1x00 and
ADC12D1x00 - Internally Terminated, Buffered, Differential
Analog Inputs - Interleaved Timing Automatic and Manual Skew
Adjust - Test Patterns at Output for System Debug
- Programmable 15-bit Gain and 12-bit Plus Sign
Offset - Programmable tAD Adjust Feature
- 1:1 Non-demuxed or 1:2 Demuxed LVDS Outputs
- AutoSync Feature for Multi-Chip Systems
- Single 1.9-V ± 0.1-V Power Supply
The 12-bit, 2.0/3.2 GSPS ADC12D1x00 device is the latest advance in TI?s Ultra High-Speed ADC family and builds upon the features, architecture, and functionality of the 10-bit GHz family of ADCs.
The ADC12D1x00 provides a flexible LVDS interface which has multiple SPI programmable options to facilitate board design and FPGA/ASIC data capture. The LVDS outputs are compatible with IEEE 1596.3-1996 and support programmable common-mode voltage.
The ADC12D1x00 is packaged in a leaded or lead-free 292-pin thermally enhanced BGA package over the rated industrial temperature range of ?40°C to 85°C.