| Sample rate (Max) (MSPS) | 40 |
| Resolution (Bits) | 14 |
| Number of input channels | 1 |
| Interface type | Parallel LVDS |
| Analog input BW (MHz) | 300 |
| Features | High Performance |
| Rating | Catalog |
| Input range (Vp-p) | 2, 4 |
| Power consumption (Typ) (mW) | 900 |
| Architecture | Pipeline |
| SNR (dB) | 76 |
| ENOB (Bits) | 12.1 |
| SFDR (dB) | 83 |
| Operating temperature range (C) | -40 to 85 |
| Input buffer | No |
- HIGH DYNAMIC RANGE:
???High SFDR: 83dB at 10MHz fIN
???High SNR: 75dB at 10MHz fIN - ON-BOARD TRACK-AND-HOLD:
???Differential Inputs
???Selectable Full-Scale Input Range - LOW POWER: 850mW
- FLEXIBLE CLOCKING:
???Differential or Single-Ended
???Accepts Sine or Square Wave Clocking Down to 0.5VPP
???Variable Threshold Level - APPLICATIONS
- COMMUNICATIONS RECEIVERS
- TEST INSTRUMENTATION
- PROFESSIONAL CCD IMAGING
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The ADS5421 is a high-dynamic range 14-bit, 40MHz, pipelined Analog-to-Digital Converter (ADC). It includes a high-bandwidth linear track-and-hold amplifier that gives excellent spurious performance up to and beyond the Nyquist rate. The clock input can accept a low-level differential sine wave or square wave signal down to 0.5VPP, further improving the Signal-to-Noise Ratio (SNR) performance.
The ADS5421 has a 4VPP differential input range (2VPP ? 2 inputs) for optimum Spurious-Free Dynamic Range (SFDR). The differential operation gives the lowest even-order harmonic components. A lower input voltage can also be selected using the internal references, further optimizing SFDR.
The ADS5421 is available in a small LQFP-64 package.