| Function | Serializer |
| Color depth (bpp) | 18 |
| Input compatibility | FPD-Link LVDS |
| Pixel clock frequency (Max) (MHz) | 43 |
| Output compatibility | FPD-Link LVDS |
| Features | Low-EMI Point-to-Point Communication |
| EMI reduction | LVDS |
| Diagnostics | BIST |
| Operating temperature range (C) | -40 to 105 |
The DS99R421 converts a FPD-Link input with 4 non-DC Balanced LVDS (3 LVDS Data + LVDS Clock) plus 3 over-sampled low speed control bits into a single LVDS DC-balanced serial stream with embedded clock information. This single serial stream simplifies transferring the 24-bit bus over a single differential pair of PCB traces and cable by eliminating the skew problems between the 3 parallel LVDS data inputs and LVDS clock paths. It saves system cost by narrowing 4 LVDS pairs to 1 LVDS pair that in turn reduce PCB layers, cable width, connector size, and pins.
The DS99R421 incorporates a single serialized LVDS signal on the high-speed I/O. Embedded clock LVDS provides a low power and low noise environment for reliably transferring data over a serial transmission path. By optimizing the converter output edge rate for the operating frequency range EMI is further reduced.
In addition the device features pre-emphasis to boost signals over longer distances using lossy cables. Internal DC balanced encoding is used to support AC-Coupled interconnects.