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具有清零端的八路 D 型触发器
Number of channels (#) 8
Technology Family LS
Supply voltage (Min) (V) 4.5
Supply voltage (Max) (V) 5.5
Input type Bipolar
Output type Push-Pull
Clock Frequency (Max) (MHz) 35
IOL (Max) (mA) 8
IOH (Max) (mA) -0.4
ICC (Max) (uA) 27000
Features High speed (tpd 10-50ns)
  • Contains Eight Flip-Flops With Single-Rail Outputs
  • Buffered Clock and Direct Clear Inputs
  • Individual Data Input to Each Flip-Flop
  • Applications Include:
    • Buffer/Storage Registers
    • Shift Registers
    • Pattern Generators

These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input.

Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output.

These flip-flops are guaranteed to respond to clock frequencies ranging form 0 to 30 megahertz while maximum clock frequency is typically 40 megahertz. Typical power dissipation is 39 milliwatts per flip-flop for the ′273 and 10 milliwatts for the ′LS273.

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