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具有预置和清零端的双路 J-K 触发器
Number of channels (#) 2
Technology Family LS
Supply voltage (Min) (V) 4.5
Supply voltage (Max) (V) 5.5
Input type Bipolar
Output type Push-Pull
Clock Frequency (Max) (MHz) 45
IOL (Max) (mA) 16
IOH (Max) (mA) -0.4
ICC (Max) (uA) 4000
Features High speed (tpd 10-50ns)
  • Package Options Include Plastic and Ceramic DIPs and Ceramic Flat Packages
  • Dependable Texas Instruments Quality and Reliability

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The '76 contains two independent J-K flip-flops with individual J-K, clock, preset, and clear inputs. The '76 is a positive-edge-triggered flip-flop. J-K input is loaded into the master while the clock is high and transferred to the slave on the high-to-low transition. For these devices the J and K inputs must be stable while the clock is high.

The 'LS76A contain two independent negative-edge-triggered flip-flops. The J and K inputs must be stable one setup time prior to the high-to-low clock transition for predictable operation. The preset and clear are asynchronous active low inputs. When low they override the clock and data inputs forcing the outputs to the steady state levels as shown in the function table.

The SN5476 and the SN54LS76A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN7476 and the SN74LS76A are characterized for operation from 0°C to 70°C.

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