| Number of channels (#) | 18 |
| Technology Family | ABT |
| Supply voltage (Min) (V) | 4.5 |
| Supply voltage (Max) (V) | 5.5 |
| Input type | TTL-Compatible CMOS |
| Output type | 3-State |
| Clock Frequency (Max) (MHz) | 150 |
| IOL (Max) (mA) | 64 |
| IOH (Max) (mA) | -32 |
| ICC (Max) (uA) | 80000 |
| Features | Very high speed (tpd 5-10ns), Partial power down (Ioff) |
- Members of the Texas Instruments WidebusTM Family
- State-of-the-Art EPIC-IIBTM BiCMOS Design Significantly Reduces Power Dissipation
- High-Impedance State During Power Up and Power Down
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
- Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
- Flow-Through Architecture Optimizes PCB Layout
- High-Drive Outputs (-32-mA IOH, 64-mA IOL)
- Package Options Include Plastic 300-mil Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings
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Widebus and EPIC-IIB are trademarks of Texas Instruments Incorporated.
These 18-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.
The 'ABT16823 can be used as two 9-bit flip-flops or one 18-bit flip-flop. With the clock-enable (
) input low, the D-type flip-flops enter data on the low-to-high transitions of the clock. Taking high disables the clock buffer, latching the outputs. Taking the clear (
) input low causes the Q outputs to go low independently of the clock.
A buffered output-enable (
) input can be used to place the nine outputs in either a normal logic state (high or low logic level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.
does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
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When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.
The SN54ABT16823 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT16823 is characterized for operation from -40°C to 85°C.
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