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具有三态输出的 16 位透明 D 类锁存器
Number of channels (#) 16
Technology Family FCT
Supply voltage (Min) (V) 4.5
Supply voltage (Max) (V) 5.5
Input type TTL-Compatible CMOS
Output type 3-State
Clock Frequency (Max) (MHz) 70
IOL (Max) (mA) 64
IOH (Max) (mA) -32
ICC (Max) (uA) 500
Features Ultra high speed (tpd <5ns), Partial power down (Ioff), Flow-through pinout
  • Ioff supports partial-power-down mode operation
  • Edge-rate control circuitry for significantly improved noise characteristics
  • Typical output skew < 250 ps
  • ESD > 2000V
  • TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages
  • Industrial temperature range of -40°C to +85°C
  • VCC = 5V ± 10%
  • CY74FCT16373T Features:
    • 64 mA sink current, 32 mA source current
    • Typical VOLP (ground bounce) <1.0V at VCC = 5V, TA = 25°C
  • CY74FCT162373T Features:
    • Balanced 24 mA output drivers
    • Reduced system switching noise
    • Typical VOLP (ground bounce) >0.6V at VCC = 5V, TA = 25°C

CY74FCT16373T and CY74FCT162373T are 16-bit D-type latches designed for use in bus applications requiring high speed and low power. These devices can be used as two independent 8-bit latches or as a single 16-bit latch by connecting the Output Enable (OE\) and Latch (LE) inputs. Flow-through pinout and small shrink packaging aid in simplifying board layout.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The CY74FCT16373T is ideally suited for driving high-capacitance loads and low-impedance backplanes.

The CY74FCT162373T has 24-mA balanced output drivers with current limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162373T is ideal for driving transmission lines.