| Number of channels (#) | 8 |
| Technology Family | LV-A |
| Supply voltage (Min) (V) | 2 |
| Supply voltage (Max) (V) | 5.5 |
| Input type | Standard CMOS |
| Output type | 3-State |
| Clock Frequency (Max) (MHz) | 70 |
| IOL (Max) (mA) | 16 |
| IOH (Max) (mA) | -16 |
| ICC (Max) (uA) | 20 |
| Features | Balanced outputs, High speed (tpd 10-50ns), Over-voltage tolerant inputs, Partial power down (Ioff) |
- 2-V to 5.5-V VCC Operation
- Maximum tpd of 8.5 ns at 5 V
- Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA = 25°C - Typical VOHV (Output VOH Undershoot)
> 2.3 V at VCC = 3.3 V, TA = 25°C - Support Mixed-Mode Voltage Operation on
All Ports - Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 250 mA
Per JESD 17 - ESD Protection Exceeds JESD 22
- 3000-V Human-Body Model
- 200-V Machine Model
- 2000-V Charged-Device Model
The SN74LV373A device is an octal transparent D-type latch designed for 2-V to 5.5-V VCC operation.