| Configuration | Serial-in, Parallel-out |
| Bits (#) | 8 |
| Technology Family | AHC |
| Supply voltage (Min) (V) | 2 |
| Supply voltage (Max) (V) | 5.5 |
| Input type | Standard CMOS |
| Output type | 3-State |
| Clock Frequency (MHz) | 115 |
| IOL (Max) (mA) | 8 |
| IOH (Max) (mA) | -8 |
| ICC (Max) (uA) | 40 |
| Features | Balanced outputs, Very high speed (tpd 5-10ns), Over-voltage tolerant inputs, Output register |
- Operating Range: 2-V to 5.5-V VCC
- 8-Bit Serial-In, Parallel-Out Shift
- Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II - ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
The SN74AHC595 device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage registers. The shift register has a direct overriding clear (SRCLR) input, a serial (SER) input, and a serial output for cascading. When the output-enable (OE) input is high, all outputs except QH′ are in the high-impedance state.