| Number of channels (#) | 9 |
| Technology Family | ALS |
| Supply voltage (Min) (V) | 4.5 |
| Supply voltage (Max) (V) | 5.5 |
| Input type | Bipolar |
| Output type | 3-State |
| Clock Frequency (Max) (MHz) | 75 |
| IOL (Max) (mA) | 24 |
| IOH (Max) (mA) | -2.6 |
| ICC (Max) (uA) | 67000 |
| Features | High speed (tpd 10-50ns), Flow-through pinout |
- 3-State Buffer-Type Outputs Drive Bus Lines Directly
- Bus-Structured Pinout
- Provides Extra Bus-Driving Latches Necessary for Wider Address/Data Paths or Buses With Parity
- Buffered Control Inputs to Reduce
dc Loading Effects - Power-Up High-Impedance State
- Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) 300-mil DIPs
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This 9-bit bus-interface D-type latch features 3-state outputs designed specifically for driving
highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The nine latches are transparent D-type latches with noninverting data (D) inputs.
A buffered output-enable (
) input places the nine outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.
does not affect the internal operation of the latches. Previously stored data can be retained or new data can be entered while the outputs are off.
The SN74ALS843 is characterized for operation from 0°C to 70°C.
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