| Number of channels (#) | 2 |
| Technology Family | LV-A |
| Supply voltage (Min) (V) | 2 |
| Supply voltage (Max) (V) | 5.5 |
| Input type | Standard CMOS |
| Output type | Push-Pull |
| Clock Frequency (Max) (MHz) | 110 |
| IOL (Max) (mA) | 12 |
| IOH (Max) (mA) | -12 |
| ICC (Max) (uA) | 20 |
| Features | Balanced outputs, High speed (tpd 10-50ns), Over-voltage tolerant inputs, Partial power down (Ioff) |
- 2-V to 5.5-V VCC Operation
- Maximum tpd of 8.5 ns at 5 V
- Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA = 25°C - Typical VOHV (Output VOH Undershoot)
> 2.3 V at VCC = 3.3 V, TA = 25°C - Support Mixed-Mode Voltage Operation on
All Ports - Ioff Supports Partial-Power-Down
Mode Operation - Latch-up Performance Exceeds 250 mA
Per JESD 17 - ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 500-V Charged-Device Model (C101)
These dual positive-edge-triggered D-type flip-flops are designed for 2-V to 5.5-V VCC operation.