| Technology Family | CD4000 |
| Number of channels (#) | 4 |
| Supply voltage (Min) (V) | 3 |
| Supply voltage (Max) (V) | 18 |
| Inputs per channel | 2 |
| IOL (Max) (mA) | 6.8 |
| IOH (Max) (mA) | -6.8 |
| Output type | Push-Pull |
| Input type | Standard CMOS |
| Features | Standard speed (tpd > 50ns) |
| Data rate (Max) (Mbps) | 8 |
| Rating | Catalog |
- Propagation delay time = 30 ns (typ.) at CL = 50 pF, VDD = 10 V
- Standardized symmetrical output characteristics
- 100% tested for maximum quiescent current at 20 V
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
- Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- 5-V, 10-V, and 15-V parametric ratings
Data sheet acquired from Harris Semiconductor
CD4001UB quad 2-input NOR gate provides the system designer with direct implementation of the NOR function and supplements the existing family of CMOS gates.
The CD4001UB types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).