Output options | Adjustable Output |
Iout (Max) (A) | 0.5 |
Vin (Max) (V) | 5.5 |
Vin (Min) (V) | 0.8 |
Vout (Max) (V) | 3.6 |
Vout (Min) (V) | 0.8 |
Noise (uVrms) | 20 |
Iq (Typ) (mA) | 1 |
Thermal resistance θJA (°C/W) | 42 |
Rating | Catalog |
Load capacitance (Min) (μF) | 2.2 |
Regulated outputs (#) | 1 |
Features | Enable, Power good, Soft start |
Accuracy (%) | 2 |
PSRR @ 100 KHz (dB) | 27 |
Dropout voltage (Vdo) (Typ) (mV) | 50 |
Operating temperature range (C) | -40 to 125 |
- FPGA Applications
- DSP Core and I/O Voltages
- Post-Regulation Applications
- Applications With Special Start-Up Time or Sequencing Requirements
- Hot-Swap and Inrush Controls
The TPS74701 low-dropout (LDO) linear regulator provides an easy-to-use, robust power management solution for a wide variety of applications. User-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and well-suited for powering many different types of processors and ASICs. The enable input and power good output allow easy sequencing with external regulators. This complete flexibility permits the user to configure a solution that meets the sequencing requirements of FPGAs, DSPs, and other applications with special start-up requirements.
A precision reference and error amplifier deliver 2% accuracy over load, line, temperature, and process. The device is stable with any type of capacitor greater than or equal to 2.2 μF, and is fully specified from –40°C to 125°C. The TPS74701 is offered in a small 3-mm × 3-mm SON-10 package for compatibility with the TPS74801.
For all available packages, see the orderable addendum at the end of the data sheet.