芯和半导体多项技术演示亮相SFF和SAFE™ Forum 2023

 

活动简介

作为三星SAFE生态系统的重要合作伙伴之一，芯和半导体将于2023年6月27日-28日参加三星Foundry 论坛及SAFE论坛2023美国站（SFF & SAFE Forum 2023）的活动。

在三星Foundry论坛中, 参与者能获得三星的远景规划及最新的技术创新，并聆听来自顶级技术专家和行业领袖嘉宾的演讲。在三星 SAFE 论坛中, 您还将了解到三星SAFE合作伙伴分享的行业趋势及在EDA, IP, DSP, 及Packaging领域的挑战和解决方案，了解高性能计算和汽车领域的先进设计解决方案，并在展馆通过与SAFE合作伙伴的讨论和合作，拓宽对行业趋势和创新技术的见解。

技术演示

芯和半导体将在此次大会上带来多项技术演示，包括：

 Metis：先进封装SI/PI分析

Metis为3DIC Chiplet先进封装提供了完整的SI/PI/多物理场分析解决方案，支持包括三星I-Cube, H-Cube, R-Cube, X-Cube在内的众多主流先进封装工艺。

Metis多尺度能力和容量优势能支持“裸芯片、中介层和基板“统一的 EM 仿真，突破了借助传统工具“剪切再缝合”方法带来的易错性和局限性。它的多模式分析选项为工程师提供了速度和精确性的选择，满足了从架构探索到最终签核的各个设计环节对仿真效率和精度的不同需求。

Metis在半导体行业国际在线平台3D InCites的最新评选中胜出，获封2023“Herb Reiter 年度最佳设计工具供应商奖”称号。

IRIS：先进工艺制程下的片上无源建模与仿真

芯和半导体射频设计平台支持从芯片、封装、模组到板级的射频全链路设计，包括射频系统设计工具XDS、片上射频及高速无源抽取工具IRIS、PDK建模及验证工具iModeler/iVerifier；IPD包括各种标准和定制集成无源器件及芯片电容等。

IRIS在三星多项先进工艺节点上获得认证，包括三星8nm LPP FinFET 工艺及28FDS FD-SOI 工艺。凭借加速的3D EM求解器，先进工艺支持以及与Virtuoso的无缝集成，IRIS能帮助RFIC设计人员实现首次设计即能成功的硅上体验。

大会议程

Samsung Foundry Forum Program:

Date:June 27th, 2023

Time:12:00 - 5:30pm PDT

Venue:Signia by Hilton San Jose, Imperial Ballroom

Address:170 S. Market St., San Jose, CA 95113

Time	R/T(min)	Program
12:00  -  13:00	60’	Networking Lunch & Registration
13:00  - 13:05	5’	Opening  (Jinman   Han, EVP & Head of DSA Office, Samsung Electronics)
13:05  - 13:20	15’	Samsung Keynote  (Siyoung Choi, President, Foundry Business, Samsung Electronics)
13:20 - 13:35	15’	“An Energy Efficient   Future of AI”  (Joe Macri, SVP, CTO of Computing & Graphics,   AMD)
13:35  - 13:50	15’	“Meeting System User   Demands in a Slowing Moore’s Law Era” (Chidi Chidambaram, Fellow, Technology   and Foundry Engineering, Qualcomm)
13:50  - 14:05	15’	Break
14:05  - 14:35	30’	Process Technology  (Gitae Jeong, EVP & Head of Technology Development, Samsung Electronics)
14:35  -  14:50	15’	Manufacturing Excellence (Sang Sup Jeong, EVP & Head of Manufacturing Technology, Samsung Electronics)
14:50  -  15:10	20’	Design Platform (Jongwook Kye, EVP & Head of Design Platform Development, Samsung Electronics)
15:10  -  15:25	15’	Sustainability (Claire Seo, VP, DS Corporate Sustainability Management, Samsung Electronics)
15:25  -  15:40	15’	Break
15:40  - 15:55	15’	“RiscV, AI, and the Next Generation of Compute” (Jim Keller, President & CEO, Tenstorrent)
15:55  -  16:15	20’	Advanced Heterogeneous Integration (Moonsoo Kang, EVP & Head of AVP Business Team, Samsung Electronics)
16:15  -  16:35	20’	Business & Customers   (Sang-Pil Sim, EVP & Head of Foundry Worldwide Sales & Marketing,   Samsung Electronics)
16:35  -  16:40	5’	Closing (Marco Chisari, EVP & Head of U.S. Foundry and SSIC, Samsung Electronics)
16:40  -  17:30	50’	Partner Pavilion & Networking

SAFE Forum Program:

Date:June 28th, 2023

Time:9:00am - 5:30pm PDT

Venue: Signia by Hilton San Jose, Imperial Ballroom & Regency Ballroom 1

Address:170 S. Market St., San Jose, CA 95113

Time	R/T(min)	Program
09:00  - 10:00	60’	Registration
10:00  -  10:05	5’	Opening (Jinman Han, EVP & Head of DSA Office, Samsung Electronics)
10:05  -  10:15	10’	Welcoming Remarks (Jongwook Kye, EVP & Head of Design Platform Development, Samsung Electronics)
10:15  -  10:35	20’	“The 3Ps of 3D-ICs” (Ajei Gopal, President & CEO, Ansys)
10:35  -  10:55	20’	“Unleashing a New Era of Compute with Chiplet-Powered Silicon” (Tony E. Pialis, President & CEO, Alphawave Semi)
10:55  -  11:15	20’	“High-Performance Design in Samsung Foundry” (Leon Stok, VP, IBM)
11:15  - 11:35	20’	Samsung Foundry Process & Business Update (Gibong Jeong, EVP & Head of Business Development, Samsung Electronics)
11:35  -  11:50	15’	Break
11:50  - 12:50	60’	Lunch (Partner Pavilion & Networking)
12:50  -  13:00	10’	Break
13:00  -  16:15	195’	[Tech Session I] Advanced Technology and Design Infrastructure	[Tech Session II] Advanced Design Solutions for HPC and Automotive
Tech   Talk: Sangyun Kim, VP & Head of Design Technology, Samsung Electronics   Room: Imperial Ballroom   Presenter: 8 partner presentations   ADT, Ansys, ARM, Cadence, Synopsys	Tech Talk: Jongshin Shin, EVP & Head of IP Ecosystem, Samsung Electronics Room: Regency Ballroom 1 Presenter: 8 partner presentations Alphawave, Cadence, CoAsia, Samsung AVP, SemiFive, Siemens, Synopsys
16:15  -  16:30	15’	Closing	Closing
16:30  -  17:30	60’	Partner Pavilion & Networking

　　审核编辑：汤梓红