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双3兆赫1200毫安降压具有300毫安的稳压器ADP5024数据表
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The ADP5024 combines two high performance buck regulators and one low dropout （LDO） regulator in a small， 24-lead， 4 mm × 4 mm LFCSP to meet demanding performance and board space requirements. The high switching frequency of the buck regulators enablestiny multilayer external components and minimizes the board space. When the MODE pin is set high， the buck regulators operate in forced PWM mode. When the MODE pin is set low， the buck regulators operate in PWM mode when the load current is aboveThe two bucks operate out of phase to reduce the input capacitor requirement. The low quiescent current， low dropout voltage， and wide input voltage range of the LDO extends the battery life of portable devices. The ADP5024 LDO maintains power supply rejection greater than 60 dB for frequencies as high as 10 kHz while operating with a low headroom voltage. Regulators in the ADP5024 are activated though dedicated enable pins. The default output voltages can be either externally set in the adjustable version or factory programmable to a wide range of preset values in the fixed voltage version.
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