资料下载
×
TB3R1,TB3R2,pdf(Quad Different
消耗积分:5 |
格式:rar |
大小:519 |
2010-08-28
131594
分享资料个
These quad differential receivers accept digital data
over balanced transmission lines. They translate
differential input logic levels to TTL output logic
levels.
The TB3R1 is a pin- and function-compatible
replacement for the Agere Systems BRF1A and
BRF2A; it includes 3-kV HBM and 2-kV CDM ESD
protection.
The TB3R2 is a pin- and function-compatible
replacement for the Agere Systems BRS2A and
BRS2B and incorporates a -125-mV receiver input
offset, preferred state output, 3-kV HBM and 2-kV
CDM ESD protection. The TB3R2 preferred state
feature places the output in the high state when the
inputs are open, shorted to ground, or shorted to the
power supply.
The power-down loading characteristics of the
receiver input circuit are approximately 8 k Ω relative
to the power supplies; hence they do not load the
transmission line when the circuit is powered down.
The package for these differential line receivers is the
16-pin SOIC (D) package.
The enable inputs of this device include internal
pullup resistors of approximately 40 k Ω that are
connected to V CC to ensure a logical high level input
if the inputs are open circuited.
over balanced transmission lines. They translate
differential input logic levels to TTL output logic
levels.
The TB3R1 is a pin- and function-compatible
replacement for the Agere Systems BRF1A and
BRF2A; it includes 3-kV HBM and 2-kV CDM ESD
protection.
The TB3R2 is a pin- and function-compatible
replacement for the Agere Systems BRS2A and
BRS2B and incorporates a -125-mV receiver input
offset, preferred state output, 3-kV HBM and 2-kV
CDM ESD protection. The TB3R2 preferred state
feature places the output in the high state when the
inputs are open, shorted to ground, or shorted to the
power supply.
The power-down loading characteristics of the
receiver input circuit are approximately 8 k Ω relative
to the power supplies; hence they do not load the
transmission line when the circuit is powered down.
The package for these differential line receivers is the
16-pin SOIC (D) package.
The enable inputs of this device include internal
pullup resistors of approximately 40 k Ω that are
connected to V CC to ensure a logical high level input
if the inputs are open circuited.
声明：本文内容及配图由入驻作者撰写或者入驻合作网站授权转载。文章观点仅代表作者本人，不代表电子发烧友网立场。文章及其配图仅供工程师学习之用，如有内容侵权或者其他违规问题，请联系本站处理。 举报投诉
评论(0)
发评论
- 相关下载
- 相关文章
