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ISL6336, ISL6336A pdf datashee
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2009-02-10
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The ISL6336, ISL6336A controls microprocessor core voltage regulation by driving up to 6 interleaved synchronous-rectified buck channels in parallel. Multiphase buck converter
architecture uses interleaved timing to multiply channel ripple
frequency and reduce input and output ripple currents. Lower
ripple results in fewer components, lower component cost,
reduced power dissipation, and smaller implementation area.
Microprocessor loads can generate load transients with
extremely fast edge rates and require high efficiency over
the full load range. The ISL6336, ISL6336A utilizes Intersil’s
proprietary Active Pulse Positioning (APP) and Adaptive
Phase Alignment (APA) modulation scheme and a
proprietary active phase dropping/adding and diode
emulation scheme to achieve extremely fast transient
response with fewer output capacitors and high efficiency from light load to full load.
architecture uses interleaved timing to multiply channel ripple
frequency and reduce input and output ripple currents. Lower
ripple results in fewer components, lower component cost,
reduced power dissipation, and smaller implementation area.
Microprocessor loads can generate load transients with
extremely fast edge rates and require high efficiency over
the full load range. The ISL6336, ISL6336A utilizes Intersil’s
proprietary Active Pulse Positioning (APP) and Adaptive
Phase Alignment (APA) modulation scheme and a
proprietary active phase dropping/adding and diode
emulation scheme to achieve extremely fast transient
response with fewer output capacitors and high efficiency from light load to full load.
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