The MAX9234/MAX9236/MAX9238 deserialize threeLVDS serial-data inputs into 21 single-endedLVCMOS/LVTTL outputs. A parallel-rate LVDS clockreceived with the LVDS data streams provides timing for
deserialization. The outputs have a separate supply,allowing 1.8V to 5V output logic levels. All these devicesare hot-swappable and allow “on-the-fly” frequencyprogramming.
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