资料下载
2.5V到5.5V115微米并行接口单电压输出8/10/12位数模转换器AD5330/5331/5340/5341
分享资料个
The AD5330/AD5331/AD5340/AD53411 are single 8-/10-/12- bit DACs. They operate from a 2.5 V to 5.5 V supply consuming just 115 μA at 3 V and feature a power-down mode that further reduces the current to 80 nA. The devices incorporate an on-chip output buffer that can drive the output to both supply rails， but the AD5330， AD5340， and AD5341 allow a choice of buffered or unbuffered reference input. The AD5330/AD5331/AD5340/AD5341 have a parallel interface. CS selects the device and data is loaded into the input registers on the rising edge of WR. The GAIN pin allows the output range to be set at 0 V to VREF or 0 V to 2 × VREF. Input data to the DACs is double-buffered， allowing simultaneous update of multiple DACs in a system using the LDAC pin. An asynchronous CLR input is also provided， which resets the contents of the input register and the DAC register to all zeros. These devices also incorporate a power-on reset circuit that ensures that the DAC output powers on to 0 V and remains there until valid data is written to the device. The AD5330/AD5331/AD5340/AD5341 are available in thin shrink small outline packages （TSSOP）.
声明：本文内容及配图由入驻作者撰写或者入驻合作网站授权转载。文章观点仅代表作者本人，不代表电子发烧友网立场。文章及其配图仅供工程师学习之用，如有内容侵权或者其他违规问题，请联系本站处理。 举报投诉
-
ouhu
2020-09-09
0 回复 举报先看一下 收起回复
- 相关下载
- 相关文章
