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CDP68HC68P1 pdf datasheet(CMOS
消耗积分:5 |
格式:rar |
大小:253 |
2008-12-22
郑成枝
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The CDP68HC68P1 is a serially addressed 8-bit
Input/Output port that allows byte or individual bit control. It
consists of three registers, an output buffer and control logic.
Data is shifted in and out of the device via shift register that
utilizes the SPI (Serial Peripheral Interface) bus. The I/O port
data flow is controlled by the Data Direction Register and
data is stored in the Data Register that outputs or senses the
logic levels at the buffered I/O pins. All inputs, including the
serial interface are Schmitt triggered. This device also
features a compare function that compares the data register
and port pin values for 4 programmable conditions and sets
a software accessible flag if the condition is satisfied. The
user also has the option of bit-set or bit-clear when writing to
the data register.
Input/Output port that allows byte or individual bit control. It
consists of three registers, an output buffer and control logic.
Data is shifted in and out of the device via shift register that
utilizes the SPI (Serial Peripheral Interface) bus. The I/O port
data flow is controlled by the Data Direction Register and
data is stored in the Data Register that outputs or senses the
logic levels at the buffered I/O pins. All inputs, including the
serial interface are Schmitt triggered. This device also
features a compare function that compares the data register
and port pin values for 4 programmable conditions and sets
a software accessible flag if the condition is satisfied. The
user also has the option of bit-set or bit-clear when writing to
the data register.
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