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Input Signal Rise and Fall Tim

消耗积分:2 | 格式:rar | 大小:444 | 2009-04-02

张敏

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All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-
Triggers are intended to always provide proper internal low and high levels, even if an
undefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.
The hysteresis of these inputs, however, is very small, and can not be properly used in an
application to suppress signal noise, and to shape slow rising/falling input transitions.
Thus, it must be taken care that rising/falling input signals pass the undefined area of the
TTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usual
and specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).
The effect of the implemented Schmitt-Trigger is that even if the input signal remains in
the undefined area, well defined low/high levels are generated internally. Note that all
input signals are evaluated at specific sample points (depending on the input and the
peripheral function connected to it), at that signal transitions are detected if two
consecutive samples show different levels. Thus, only the current level of an input signal
at these sample points is relevant, that means, the necessary rise/fall times of the input
signal is only dependant on the sample rate, that is the distance in time between two
consecutive evaluation time points. If an input signal, for instance, is sampled through
software every 10us, it is irrelevant, which input level would be seen between the
samples. Thus, it would be allowable for the signal to take 10us to pass through the
undefined area. Due to the sample rate of 10us, it is assured that only one sample can
occur while the signal is within the undefined area, and no incorrect transition will be
detected. For inputs which are connected to a peripheral function, e.g. capture inputs, the
sample rate is determined by the clock cycle of the peripheral unit. In the case of the
CAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requires
input signals to pass through the undefined area within these 400ns in order to avoid
multiple capture events.
For input signals, which do not provide the required rise/fall times, external circuitry must
be used to shape the signal transitions.
In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in the
diagram represent possible sample points. Waveform a) shows the result if the input
signal transition time through the undefined TTL-level area is less than the time distance
between the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result if
the sampling is performed more than once within the undefined area (sampling at 1, 2, 5,
3, and 4).
Sample points:
1. Evaluation of the signal clearly results in a low level
2. Either a low or a high level can be sampled here. If low is sampled, no transition will
be detected. If the sample results in a high level, a transition is detected, and an
appropriate action (e.g. capture) might take place.
3. Evaluation here clearly results in a high level. If the previous sample 2) had already
detected a high, there is no change. If the previous sample 2) showed a low, a
transition from low to high is detected now.

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