DDS AD9959应用电路和配置源程序
AD9959是一款有四个DDS通道,最高达500M SPS的数字频率合成芯片。
常用电路接法:
主要程序:
#include "config.h"
void delay(void)
{
unsigned int i;
for(i=0;i<10;i++);
}
/*****************************************************************************
功能描述: 加载寄存器,上升延有效
*****************************************************************************/
void run(void)
{
CLR_IOUPDATE;
CLR_IOUPDATE;
CLR_IOUPDATE;
CLR_IOUPDATE;
CLR_IOUPDATE;
CLR_IOUPDATE;
CLR_IOUPDATE;
SET_IOUPDATE;
SET_IOUPDATE;
}
/*****************************************************************************
函数名: write_a_byte
功能描述: 通过串口写一个字节,MSB first,上升延有效
*****************************************************************************/
void write_a_byte(uint8 w_data)
{
uint8 i;
for(i=0;i<8;i++)
{
if(w_data & 0x80)
{
SET_SDIO0;
}
else
{
CLR_SDIO0;
}
w_data <<= 1;
SET_DDSSCLK;
CLR_DDSSCLK;
}
}
/*****************************************************************************
函数名: write_CSR
功能描述: 写CSR寄存器:
*****************************************************************************/
void write_CSR(uint8 w_data)
{
CLR_SDIO3;
CLR_DDSCS;
write_a_byte(0x00); //write address 0. CSR's address is 0.
write_a_byte(w_data);
SET_DDSCS;
SET_SDIO3;
}
void write_FR1(uint8 w_data1,uint8 w_data2,uint8 w_data3)
{
CLR_SDIO3;
CLR_DDSCS;
write_a_byte(0x01); //write address 1. FR1's address is 0x01
write_a_byte(w_data1);
write_a_byte(w_data2);
write_a_byte(w_data3);
SET_DDSCS;
SET_SDIO3;
}
void write_FR2(uint8 w_data1,uint8 w_data2)
{
CLR_SDIO3;
CLR_DDSCS;
write_a_byte(0x02); //write address 2
write_a_byte(w_data1);
write_a_byte(w_data2);
SET_DDSCS;
SET_SDIO3;
}
void write_CFR(uint8 w_data1,uint8 w_data2,uint8 w_data3)
{
CLR_SDIO3;
CLR_DDSCS;
write_a_byte(0x03);
write_a_byte(w_data1);
write_a_byte(w_data2);
write_a_byte(w_data3);
SET_DDSCS;
SET_SDIO3;
}
void write_CTW0(uint32 F_word) //Channel Frequency Tuning Word (CTW0)
{
CLR_SDIO3;
CLR_DDSCS;
write_a_byte(0x04);
write_a_byte(((unsigned char *)(&F_word))[3]);
write_a_byte(((unsigned char *)(&F_word))[2]);
write_a_byte(((unsigned char *)(&F_word))[1]);
write_a_byte(((unsigned char *)(&F_word))[0]);
SET_DDSCS;
SET_SDIO3;
}
void write_CPW0(uint16 P_word) //Channel Phase1 Offset Word (CPW0) (0x05)
{
CLR_SDIO3;
CLR_DDSCS;
write_a_byte(0x05);
write_a_byte(((unsigned char *)(&P_word))[1]&0x3F);
write_a_byte((((unsigned char *)(&P_word))[0]));
SET_DDSCS;
SET_SDIO3;
}
void write_ACR(uint32 A_word)
{
CLR_SDIO3;
CLR_DDSCS;
write_a_byte(0x06);
write_a_byte(((unsigned char *)(&A_word))[3]);
write_a_byte(((unsigned char *)(&A_word))[2]);
write_a_byte(((unsigned char *)(&A_word))[1]);
SET_DDSCS;
SET_SDIO3;
}
void write_LSR(uint8 rising,uint8 falling)
{
CLR_SDIO3;
CLR_DDSCS;
write_a_byte(0x07);
write_a_byte(rising);
write_a_byte(falling);
SET_DDSCS;
SET_SDIO3;
}
void write_RDW(uint32 rising)
{
CLR_SDIO3;
CLR_DDSCS;
write_a_byte(0x08);
write_a_byte(((unsigned char *)(&rising))[3]);
write_a_byte(((unsigned char *)(&rising))[2]);
write_a_byte(((unsigned char *)(&rising))[1]);
write_a_byte(((unsigned char *)(&rising))[0]);
SET_DDSCS;
SET_SDIO3;
}
void write_FDW(uint32 falling)
{
CLR_SDIO3;
CLR_DDSCS;
write_a_byte(0x09);
write_a_byte(((unsigned char *)(&falling))[3]);
write_a_byte(((unsigned char *)(&falling))[2]);
write_a_byte(((unsigned char *)(&falling))[1]);
write_a_byte(((unsigned char *)(&falling))[0]);
SET_DDSCS;
SET_SDIO3;
}
void write_CTWn(uint8 n,uint32 w_data)
{
CLR_SDIO3;
CLR_DDSCS;
write_a_byte(n+0x09); //CTWn's address is n+0x09.n>=1 and n<=15.
write_a_byte(((unsigned char *)(&w_data))[3]);
write_a_byte(((unsigned char *)(&w_data))[2]);
write_a_byte(((unsigned char *)(&w_data))[1]);
write_a_byte(((unsigned char *)(&w_data))[0]);
SET_DDSCS;
SET_SDIO3;
}
#define PLL_DIV 5
#define systemp_frequency (22.1184*1000000*PLL_DIV)
void set_frequency(uint32 f)
{
unsigned long int temp;
temp=(unsigned long int)f*(0xFFFFFFFF/(float)systemp_frequency+1.0/systemp_frequency);
write_CTW0(temp);
}
uint32 change(uint32 f)
{
unsigned long int temp;
temp=(unsigned long int)f*(0xFFFFFFFF/(float)systemp_frequency+1.0/systemp_frequency);
return temp;
}
void AD9959_init(void)
{
uint16 i;
DDS_DDR = 0xff;
CLR_DDSRESET;
for(i=0;i<10000;i++);
SET_DDSCS;
CLR_DDSSCLK;
SET_SDIO3;
SET_DDSRESET;
for(i=0;i<10000;i++);
CLR_DDSRESET;
for(i=0;i<100;i++);
}
声明:本文内容及配图由入驻作者撰写或者入驻合作网站授权转载。文章观点仅代表作者本人,不代表电子发烧友网立场。文章及其配图仅供工程师学习之用,如有内容侵权或者其他违规问题,请联系本站处理。 举报投诉
全部1条评论
快来发表一下你的评论吧 !