State-machine methodology defines the contents of every flip-flop in a design under every circumstance that might arise. It also defines all the possible transitions that can cause the design to go from one of these states to another. In its simplest form, this is just a rigorous way of designing synchronous logic, like 4-bit counters. For more complex designs, the state-machine approach gives the designer a tool to analyze all possible operating conditions, and so avoid overlooked hang-up states or undesired transitions. LCA devices with their abundance of flip-flops lend themselves well to state-machine designs.