Over the past several years, the DRAM industry has seen rapid acceptance of synchronous memory as a reliable means to increase overall memory bandwidth. Initially operating at a 66 MHz clock (15 ns data rate), synchronous DRAMs (SDRAMs) provided a 2X increase in memory data rate over previous mainstream solutions, such as extended data out (EDO). As with previous asynchronous memory solutions, the desire for ever-increasing bandwidth led to the widespread introduction of 100 MHz memory interfaces in early 1998 (commonly called PC100), and this memory performance is now widely used in data processing and related products.