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MPC755 32位嵌入式微处理器功能及特性的介绍说明
消耗积分:5 |
格式:rar |
大小:813 |
2009-07-01
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The MPC755 is a derivative of the MPC750 microprocessor design and is intended
primarily for use in embedded systems. All of the information in the
MPC750 RISC Microprocessor UserÕs Manual
applies to the MPC755 microprocessor with the exceptions
and additions noted in this document. In the event the two documents conßict with each other, this document supersedes the information in the
MPC750 RISC Microprocessor UserÕs Manual.
The MPC745 is a lower-pin-count device that operates identically to the MPC755, except that it doesnÕt implement the L2 cache interface. In the same way that the
MPC750 UserÕs Manual also describes the functionality of the MPC740, this document describes the functionality of the MPC745. All information herein applies to the MPC745, except where otherwise noted (in particular, the L2 cache information does not apply to the MPC745).
primarily for use in embedded systems. All of the information in the
MPC750 RISC Microprocessor UserÕs Manual
applies to the MPC755 microprocessor with the exceptions
and additions noted in this document. In the event the two documents conßict with each other, this document supersedes the information in the
MPC750 RISC Microprocessor UserÕs Manual.
The MPC745 is a lower-pin-count device that operates identically to the MPC755, except that it doesnÕt implement the L2 cache interface. In the same way that the
MPC750 UserÕs Manual also describes the functionality of the MPC740, this document describes the functionality of the MPC745. All information herein applies to the MPC745, except where otherwise noted (in particular, the L2 cache information does not apply to the MPC745).
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