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Design Compiler Ultra
消耗积分:5 |
格式:rar |
大小:223 |
2009-11-19
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Design Compiler Ultra™ is the best-in-class, production RTL Synthesis solution enabling
users to meet today’s design challenges such as fastest timing, smallest area, lowest power
consumption and highest test coverage in the shortest design cycle time. DC Ultra achieves
this by concurrently applying its unique algorithms to optimize for timing, area, power and test.
Innovation in synthesis has always been synonymous with Design Compiler. Continuing
the trend, Synopsys now brings to you the latest innovation in synthesis - Design Compiler
Topographical Technology. Topographical technology enables a predictable flow resulting
in faster time to results by eliminating the costly iteration between synthesis and layout. It
accurately predicts post-layout results such as timing, power and area in synthesis while
eliminating the need for Wire-load model based approximations.
users to meet today’s design challenges such as fastest timing, smallest area, lowest power
consumption and highest test coverage in the shortest design cycle time. DC Ultra achieves
this by concurrently applying its unique algorithms to optimize for timing, area, power and test.
Innovation in synthesis has always been synonymous with Design Compiler. Continuing
the trend, Synopsys now brings to you the latest innovation in synthesis - Design Compiler
Topographical Technology. Topographical technology enables a predictable flow resulting
in faster time to results by eliminating the costly iteration between synthesis and layout. It
accurately predicts post-layout results such as timing, power and area in synthesis while
eliminating the need for Wire-load model based approximations.
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