Single-level cell (SLC) technology
• Organization
– Page size x8: 2,112 bytes (2,048 + 64 bytes
– Block size: 64 pages (128K + 4K bytes)
– Plane size: 2,048 blocks
– Device size: 4Gb: 4,096 blocks; 8Gb: 8,192 blocks;
16Gb: 16,384 blocks
• READ performance
– Random READ: 25µs (MAX)
– Sequential READ: 25ns (MIN)
• WRITE performance
– PROGRAM PAGE: 220µs (TYP)
– BLOCK ERASE: 1.5ms (TYP)
• Data retention: 10 years
• Endurance: 100,000 PROGRAM/ERASE cycles
• First block (block address 00h) guaranteed to be
valid up to 1,000 PROGRAM/ERASE cycles1
• Industry-standard basic NAND Flash command set
• Advanced command set:
– PROGRAM PAGE CACHE MOD
– PAGE READ CACHE MOD
– One-time programmable (OTP) commands
– Two-plane commands
– Interleaved die operations
– READ UNIQUE ID (contact factory
– READ ID2 (contact factory)
• Operation status byte provides a software method of
detecting:
– Operation completion
– Pass/fail condition
– Write-protect status
• Ready/busy# (R/B#) signal provides a hardware
method of detecting operation completion
• WP# signal: write protect entire device
• RESET required after power-up
• INTERNAL DATA MOVE operations supported
within the plane from which data is read
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