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CY74FCT2652CT,pdf(8-Bit Regist

消耗积分:2 | 格式:rar | 大小:421 | 2010-07-21

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The CY74FCT2652T consists of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal storage registers. Control (GAB and GBA\) inputs control the transceiver functions. Select-control (SAB and SBA) inputs select either real-time or stored data transfer.

The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during transition between stored and real-time data. A low input level selects real-time data, and a high level selects stored data. Data on the A or B data bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the appropriate clock (CPAB or CPBA) inputs, regardless of levels at the select- or enable-control inputs.

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