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TFP101/A, TFP201/A, TFP401/A,
消耗积分:2 |
格式:rar |
大小:19 |
2010-08-24
张静
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Changes to document:
In the package drawing page, change the package figure as described:
a) Re-size the thermal pad dashed box from its present size to 5.05mm, centered in the package.
b)
Add dimensions to re-sized pad showing: 5.05 SQ
3.95
c) Change note D to read:
The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane.
This pad is centered on the package and is electrically and thermally connected to the backside of the die.
In the “PowerPAD…” section, add a sentence to paragraph 1, reword paragraph 2 and add figure and
paragraphs between existing paragraphs 2 &3 to read:
… Soldering the back side of the … to the application board is not required thermally as the
device power dissipation is well within the package capability when not soldered. If traces or vias
are located under the back side pad, they should be protected by suitable solder mask or other
assembly technique to prevent inadvertent shorting to the exposed back side pad.
Soldering the back side pad of the device to a thermal land connected to the PCB ground plane is
recommended for electrical and EMI considerations. The thermal land may be soldered to the
exposed PowerPAD using standard reflow soldering techniques.
The recommended pad size for the grounded thermal land is 5.6mm minimum, centered in the
device land pattern. When vias are required to ground the land, multiple vias are recommended
for a low impedance connection to the ground plane. Vias in the exposed pad should be small
enough or filled to prevent wicking the solder away from the interface between the package body
and the thermal land on the surface of the board during solder reflow.
In the package drawing page, change the package figure as described:
a) Re-size the thermal pad dashed box from its present size to 5.05mm, centered in the package.
b)
Add dimensions to re-sized pad showing: 5.05 SQ
3.95
c) Change note D to read:
The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane.
This pad is centered on the package and is electrically and thermally connected to the backside of the die.
In the “PowerPAD…” section, add a sentence to paragraph 1, reword paragraph 2 and add figure and
paragraphs between existing paragraphs 2 &3 to read:
… Soldering the back side of the … to the application board is not required thermally as the
device power dissipation is well within the package capability when not soldered. If traces or vias
are located under the back side pad, they should be protected by suitable solder mask or other
assembly technique to prevent inadvertent shorting to the exposed back side pad.
Soldering the back side pad of the device to a thermal land connected to the PCB ground plane is
recommended for electrical and EMI considerations. The thermal land may be soldered to the
exposed PowerPAD using standard reflow soldering techniques.
The recommended pad size for the grounded thermal land is 5.6mm minimum, centered in the
device land pattern. When vias are required to ground the land, multiple vias are recommended
for a low impedance connection to the ground plane. Vias in the exposed pad should be small
enough or filled to prevent wicking the solder away from the interface between the package body
and the thermal land on the surface of the board during solder reflow.
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