×

三重200毫安低噪声高电源抑制比的电压调节器ADP320数据表

消耗积分:0 | 格式:rar | 大小:1.12 MB | 2017-10-27

分享资料个

  The ADP320 200 mA triple output LDO combines high PSRR, low noise, low quiescent current, and low dropout voltage in a voltage regulator ideally suited for wireless applications with demanding performance and board space requirements. The low quiescent current, low dropout voltage, and wide input voltage range of the ADP320 triple LDO extend the battery life of portable devices. The ADP320 triple LDO maintains power supply rejection greater than 60 dB for frequencies as high as 100 kHz while operating with a low headroom voltage. The ADP320 triple LDO offers much lower noise performance than competing LDOs without the need for a noise bypass capacitor. The ADP320 triple LDO is available in a miniature 16-lead 3 mm × 3 mm LFCSP package and is stable with tiny 1 µF ±30% ceramic output capacitors, resulting in the smallest possible board area for a wide variety of portable power needs. The ADP320 triple LDO is available in output voltage combinations ranging from 0.8 V to 3.3 V and offers over current and thermal protection to prevent damage in adverse conditions.
三重200毫安低噪声高电源抑制比的电压调节器ADP320数据表

声明:本文内容及配图由入驻作者撰写或者入驻合作网站授权转载。文章观点仅代表作者本人,不代表电子发烧友网立场。文章及其配图仅供工程师学习之用,如有内容侵权或者其他违规问题,请联系本站处理。 举报投诉

评论(0)
发评论

下载排行榜

全部0条评论

快来发表一下你的评论吧 !