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HM-65262 pdf datasheet (12MHz,
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格式:rar |
大小:344 |
2009-01-09
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The HM-65262 is a CMOS 16384 x 1-bit Static Random
Access Memory manufactured using the Intersil Advanced
SAJI V process. The device utilizes asynchronous circuit
design for fast cycle times and ease of use. The HM-65262
is available in both JEDEC standard 20 pin, 0.300 inch wide
CERDIP and 20 pad CLCC packages, providing high boardlevel
packing density. Gated inputs lower standby current,
and also eliminate the need for pull-up or pull-down resistors.
The HM-65262, a full CMOS RAM, utilizes an array of six
transistor (6T) memory cells for the most stable and lowest
possible standby supply current over the full military temperature
range. In addition to this, the high stability of the 6T
RAM cell provides excellent protection against soft errors
due to noise and alpha particles. This stability also improves
the radiation tolerance of the RAM over that of four transistor
(4T) devices.
Access Memory manufactured using the Intersil Advanced
SAJI V process. The device utilizes asynchronous circuit
design for fast cycle times and ease of use. The HM-65262
is available in both JEDEC standard 20 pin, 0.300 inch wide
CERDIP and 20 pad CLCC packages, providing high boardlevel
packing density. Gated inputs lower standby current,
and also eliminate the need for pull-up or pull-down resistors.
The HM-65262, a full CMOS RAM, utilizes an array of six
transistor (6T) memory cells for the most stable and lowest
possible standby supply current over the full military temperature
range. In addition to this, the high stability of the 6T
RAM cell provides excellent protection against soft errors
due to noise and alpha particles. This stability also improves
the radiation tolerance of the RAM over that of four transistor
(4T) devices.
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