This document presents the steps to setup an environment for using the EVAL-AD8403SDZ evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-AD8403SDZ Evaluation Board with the Xilinx KC705 board.
For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to use the part evaluation setup. This consists of:
The SDP-B controller board is part of Analog Devices System Demonstration Platform (SDP). It provides a high speed USB 2.0 connection from the PC to the component evaluation board. The PC runs the evaluation software. Each evaluation board, which is an SDP compatible daughter board, includes the necessary installation file required for performance testing.
Note: it is expected that the analog performance on the two platforms may differ.
Below is presented a picture of SDP-B Controller Board with the EVAL-AD8403SDZ Evaluation Board.
The AD8403 is a quad-channel, 256-position, digitally controlled variable resistor device. This device performs the same electronic adjustment function as a mechanical potentiometer or variable resistor. The AD8403 contains four independent variable resistors. Each variable resistor offers a completely programmable value of resistance between the A terminal and the wiper or the B terminal and the wiper. The fixed A-to-B terminal resistance of 1 kO, 10 kO, 50 kO, or 100 kO has a ±1% channel-to-channel matching tolerance with a nominal temperature coefficient of 500 ppm/°C.
The EVAL-AD8403SDZ evaluation board is designed to help customers quickly prototype new AD8403 circuits and reduce design time. The EVAL-AD8403SDZ incorporates several test circuits to evaluate the AD8403 performance.
The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project.
Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.
The following commands were implemented in this version of EVAL-AD8403 reference project for Xilinx KC705 FPGA board.
Command | Description |
---|---|
help? | Displays all available commands. |
rdac= | Load the wiper register with a give value. Accepted values: channel: 0 - select RDAC 1 wiper register. 1 - select RDAC 2 wiper register. 2 - select RDAC 3 wiper register. 3 - select RDAC 4 wiper register. value: 0 .. 255 - value to be written in register. |
rdac? | Read back the value of the wiper register. Accepted values: channel: 0 - select RDAC 1 wiper register. 1 - select RDAC 2 wiper register. 2 - select RDAC 3 wiper register. 3 - select RDAC 4 wiper register. |
wbuf1? | Read back the value of the Wiper Buffer in voltage. (VDD=3.2V) |
shutdown= | Shutdown connects wiper to B terminal and open circuits the A terminal. Accepted values: channel: 0 - select RDAC 1 wiper register. 1 - select RDAC 2 wiper register. 2 - select RDAC 3 wiper register. 3 - select RDAC 4 wiper register. |
shutdown? | Notify about the state of the selected RDAC. Accepted values: channel: 0 - select RDAC 1 wiper register. 1 - select RDAC 2 wiper register. 2 - select RDAC 3 wiper register. 3 - select RDAC 4 wiper register. |
Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.
The following image shows a generic list of commands in a serial terminal connected to Xilinx KC705 FPGA's UART peripheral.
The hardware platform for each reference projects with FMC-SDP interposer and KC705 evaluation board is common. The next steps should be followed to recreate the software project of the reference design:
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