The performances of RF power amplifiers for base station transceivers results in a tradeoff between linearity, efficiency and gain. This tradeoff leads to an optimum quiescent current. But the following parameters modify this bias point: temperature range (commonly –40°C/+85°C), supply voltage and bias voltage variations (commonly +/–5%) and manufacturing spread. The purpose of this paper is to present a new biasing circuit which minimizes quiescent current variations suitable for LDMOS RF power transistors.