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在Xilinx CoolRunner系列的XPLA3 CPL

消耗积分:5 | 格式:rar | 大小:333 | 2009-05-13

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The Serial Peripheral Interface (SPI) is a full-duplex, synchronous, serial data link that is
standard across many microprocessors, microcontrollers, and peripherals. It enables
communication between microprocessors and peripherals and/or inter-processor
communication. The SPI system is flexible enough to interface directly with numerous
commercially available peripherals.
A SPI Master design has been implemented in a CoolRunner XPLA3 CPLD. The CoolRunner
SPI Master design can be used to provide a SPI controller to those microcontrollers or
microprocessors that do not contain a SPI interface. A high-level block diagram is shown in
Figure 1. The microcontroller (μC) interface chosen in this SPI Master implementation is based
on the popular 8051 microcontroller bus cycles, but can easily be modified to other
microcontroller interfaces. For more information on the 8051 microcontroller interface, please
refer to XAPP349, CoolRunner CPLD 8051 Microcontroller Interface.
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