The emergence of higher bandwidth networking systems and infrastructures has driven SRAM vendors to search for faster data throughput solutions. One such SRAM architecture standardized by Motorola, IDT, and Micron is called Zero Bus TurnaroundE (ZBT). The ZBT RAM eliminates bus latency by providing a more efficient use of the system bus at a significant cost reduction to the customer. Motorola’s new 4M–bit ZBT SRAM is the ideal solution for high–end networking and data communication systems that require back–to–back reads and writes.