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锁相环频率合成器:相位噪声问题和宽带循环
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锁相环频率合成器:相位噪声问题和宽带循环:
In this chapter we locate the context of this thesis by introducing basic aspects and innovation tendencies for the frontends of TV broadcasting receivers.
This thesis focuses on the frequency synthesizer block, which is a constituent part of the frontend.
PLL frequency synthesizers are a common element of different telecommunication receivers that are produced on a large scale. This choice is connected to their compactness and low cost, both of which are continuously improved by larger integration levels.
Furthermore, emerging digital modulation techniques are imposing new requirements on this block, which carries out the frequency conversion of the input data.
Finally, we shortly describe the constituent elements of the PLL synthesizer, so as to present their functionality and general structure.
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