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AD809,pdf datasheet (155.52 MH
消耗积分:3 |
格式:rar |
大小:501 |
2009-09-16
吴藩
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The device has a low cost, on-chip VCO that locks to either
8´ or 16´ the frequency at the 19.44 MHz or 9.72 MHz input.
No external components are needed for frequency synthesis; however,
the user can adjust loop dynamics through selection of a
damping factor capacitor whose value determines loop damping.
The AD809 design guarantees that the clock output frequency
will drift low (by roughly 20%) in the absence of a signal at the
input.
8´ or 16´ the frequency at the 19.44 MHz or 9.72 MHz input.
No external components are needed for frequency synthesis; however,
the user can adjust loop dynamics through selection of a
damping factor capacitor whose value determines loop damping.
The AD809 design guarantees that the clock output frequency
will drift low (by roughly 20%) in the absence of a signal at the
input.
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