资料下载
×
DS90LV110AT,pdf datasheet (1 t
消耗积分:3 |
格式:rar |
大小:556 |
2009-10-12
分享资料个
DS90LV110A is a 1 to 10 data/clock distributor utilizing LVDS
(Low Voltage Differential Signaling) technology for low power,
high speed operation. Data paths are fully differential from
input to output for low noise generation and low pulse width
distortion. The design allows connection of 1 input to all 10
outputs. LVDS I/O enable high speed data transmission for
point-to-point interconnects. This device can be used as a
high speed differential 1 to 10 signal distribution / fanout replacing
multi-drop bus applications for higher speed links with
improved signal quality. It can also be used for clock distribution
up to 200MHz.
(Low Voltage Differential Signaling) technology for low power,
high speed operation. Data paths are fully differential from
input to output for low noise generation and low pulse width
distortion. The design allows connection of 1 input to all 10
outputs. LVDS I/O enable high speed data transmission for
point-to-point interconnects. This device can be used as a
high speed differential 1 to 10 signal distribution / fanout replacing
multi-drop bus applications for higher speed links with
improved signal quality. It can also be used for clock distribution
up to 200MHz.
声明：本文内容及配图由入驻作者撰写或者入驻合作网站授权转载。文章观点仅代表作者本人，不代表电子发烧友网立场。文章及其配图仅供工程师学习之用，如有内容侵权或者其他违规问题，请联系本站处理。 举报投诉
评论(0)
发评论
- 相关下载
- 相关文章
