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LPC2101/LPC2102/LPC2103 pdf da
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2008-08-24
南风一号
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The LPC2101/2102/2103 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S
CPU with real-time emulation that combines the microcontroller with 8 kB, 16 kB or 32 kB
of embedded high-speed flash memory. A 128-bit wide memory interface and a unique
accelerator architecture enable 32-bit code execution at the maximum clock rate. For
critical performance in interrupt service routines and DSP algorithms, this increases
performance up to 30 % over Thumb mode. For critical code size applications, the
alternative 16-bit Thumb mode reduces code by more than 30 % with minimal
performance penalty.
Due to their tiny size and low power consumption, the LPC2101/2102/2103 are ideal for
applications where miniaturization is a key requirement. A blend of serial communications
interfaces ranging from multiple UARTs, SPI to SSP and two I2C-buses, combined with
on-chip SRAM of 2 kB/4 kB/8 kB, make these devices very well suited for communication
gateways and protocol converters. The superior performance also makes these devices
suitable for use as math coprocessors. Various 32-bit and 16-bit timers, an improved
10-bit ADC, PWM features through output match on all timers, and 32 fast GPIO lines with
up to nine edge or level sensitive external interrupt pins make these microcontrollers
particularly suitable for industrial control and medical systems.
CPU with real-time emulation that combines the microcontroller with 8 kB, 16 kB or 32 kB
of embedded high-speed flash memory. A 128-bit wide memory interface and a unique
accelerator architecture enable 32-bit code execution at the maximum clock rate. For
critical performance in interrupt service routines and DSP algorithms, this increases
performance up to 30 % over Thumb mode. For critical code size applications, the
alternative 16-bit Thumb mode reduces code by more than 30 % with minimal
performance penalty.
Due to their tiny size and low power consumption, the LPC2101/2102/2103 are ideal for
applications where miniaturization is a key requirement. A blend of serial communications
interfaces ranging from multiple UARTs, SPI to SSP and two I2C-buses, combined with
on-chip SRAM of 2 kB/4 kB/8 kB, make these devices very well suited for communication
gateways and protocol converters. The superior performance also makes these devices
suitable for use as math coprocessors. Various 32-bit and 16-bit timers, an improved
10-bit ADC, PWM features through output match on all timers, and 32 fast GPIO lines with
up to nine edge or level sensitive external interrupt pins make these microcontrollers
particularly suitable for industrial control and medical systems.
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