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AD7233AN pdf datasheet
消耗积分:3 |
格式:rar |
大小:5655 |
2008-08-29
李鸿洋
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The AD7233 is a complete 12-bit, voltage-output, digital-toanalog
converter with output amplifier and Zener voltage reference
all in an 8-lead package. No external trims are required to
achieve full specified performance. The data format is two’s
complement, and the output range is –5 V to +5 V.
The AD7233 features a fast, versatile serial interface which allows
easy connection to both microcomputers and 16-bit digital
signal processors with serial ports. When the SYNC input is
taken low, data on the SDIN pin is clocked into the input shift
register on each falling edge of SCLK. On completion of the
16-bit data transfer, bringing LDAC low updates the DAC latch
with the lower 12 bits of data and updates the output. Alternatively,
LDAC can be tied permanently low, and in this case the
DAC register is automatically updated with the contents of the
shift register when all sixteen data bits have been clocked in.
The serial data may be applied at rates up to 5 MHz allowing a
DAC update rate of 300 kHz.
For applications which require greater flexibility and unipolar
output ranges with single supply operation, please refer to the
AD7243 data sheet.
The AD7233 is fabricated on Linear Compatible CMOS
(LC2MOS), an advanced, mixed-technology process. It is packaged
in an 8-lead DIP package.
converter with output amplifier and Zener voltage reference
all in an 8-lead package. No external trims are required to
achieve full specified performance. The data format is two’s
complement, and the output range is –5 V to +5 V.
The AD7233 features a fast, versatile serial interface which allows
easy connection to both microcomputers and 16-bit digital
signal processors with serial ports. When the SYNC input is
taken low, data on the SDIN pin is clocked into the input shift
register on each falling edge of SCLK. On completion of the
16-bit data transfer, bringing LDAC low updates the DAC latch
with the lower 12 bits of data and updates the output. Alternatively,
LDAC can be tied permanently low, and in this case the
DAC register is automatically updated with the contents of the
shift register when all sixteen data bits have been clocked in.
The serial data may be applied at rates up to 5 MHz allowing a
DAC update rate of 300 kHz.
For applications which require greater flexibility and unipolar
output ranges with single supply operation, please refer to the
AD7243 data sheet.
The AD7233 is fabricated on Linear Compatible CMOS
(LC2MOS), an advanced, mixed-technology process. It is packaged
in an 8-lead DIP package.
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