Allegro Package Designer Cadence Allegro Package Designer products streamline IC package design and IC package co-design. They comprise a complete constraint-driven physical design solution that supports virtually all packaging methods. New chip-level I/O planning and co-design capabilities based on Cadence First Encounter deliver key capabilities to designers of complex, leading-edge devices. An embedded 3D field solver provides full package-level simulation modeling, enabling PCB designers to design-in new devices faster and more accurately.