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CN0194 FMC-SDP转接器和评估板/Xilinx KC705参考设计

消耗积分:2 | 格式:pdf | 大小:374.18KB | 2021-05-16

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This version (09 Jan 2021 00:54) was approved by Robin Getz.The Previously approved version (31 Dec 2020 05:55) is available.Diff

CN0194 FMC-SDP Interposer & Evaluation Board / Xilinx KC705 Reference Design

Supported Devices

Reference Circuits

Overview

This document presents the steps to setup an environment for using the EVAL-CN0194-SDPZ evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-CN0194-SDPZ Evaluation Board with the Xilinx KC705 board.

cn0194.jpg

For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to use the part evaluation setup. This consists of:

  • 1. A controller board like the SDP-B ( EVAL-SDP-CS1Z)
  • 2. The component SDP compatible product evaluation board
  • 3. Corresponding PC software ( shipped with the product evaluation board)

The SDP-B controller board is part of Analog Devices System Demonstration Platform (SDP). It provides a high speed USB 2.0 connection from the PC to the component evaluation board. The PC runs the evaluation software. Each evaluation board, which is an SDP compatible daughter board, includes the necessary installation file required for performance testing.

Note: it is expected that the analog performance on the two platforms may differ.

28 Sep 2012 10:32 · Adrian Costina

Below is presented a picture of SDP-B Controller Board with the EVAL-CN0194-SDPZ Evaluation Board.

cn0194_sdp1z.jpg

The EVAL-CN0194-SDPZ board provides galvanic isolation for high speed, high accuracy, simultaneous sampling analog-to-digital conversion applications. The 16-bit AD7685 PulSAR ADC is versatile and allows monitoring of multiple channels through daisy chaining. When using this evaluation board with the SDP board or BeMicro SDK board, connect a +6 V power supply to the pins marked “+6V CFTL” and “+6 V SDP” on the board.

The AD7685 is a 16-bit, charge redistribution successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD, between 2.3 V to 5.5 V. It contains a low power, high speed, 16-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port. The part also contains a low noise, wide bandwidth, short aperture delay, track-and-hold circuit. On the CNV rising edge, it samples an analog input IN+ between 0 V to REF with respect to a ground sense IN-. The reference voltage, REF, is applied externally and can be set up to the supply voltage.

Power dissipation scales linearly with throughput.

The SPI-compatible serial interface also features the ability, using the SDI input, to daisy chain several ADCs on a single 3-wire bus or provides an optional BUSY indicator. It is compatible with 1.8 V, 2.5 V, 3 V, or 5 V logic using the separate supply VIO.

More information

Getting Started

The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project.

Required Hardware

Required Software

  • Xilinx ISE 14.6.
  • UART Terminal (Termite/Tera Term/Hyperterminal), baud rate 115200.
  • The EVAL-CN0194 reference project for Xilinx KC705 FPGA.

Downloads

Run the Demonstration Project

Hardware setup


Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.

  • Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.
  • Connect the JTAG and UART cables to the KC705 and power up the FPGA board.

Reference Project Overview

The following commands were implemented in this version of EVAL-CN0194 reference project for Xilinx KC705 FPGA board.

Command Description
help? Displays all available commands.
adcCode? Displays the ADC Code for selected channel. Accepted values:
1 - channel 1.
2 - channel 2.
voltage? Displays the input voltage for selected channel. Accepted values:
1 - channel 1.
2 - channel 2.

Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.

The following image shows a generic list of commands in a serial terminal connected to Xilinx KC705 FPGA's UART peripheral. terminal_kc705.jpg

Software Project Setup

The hardware platform for each reference projects with FMC-SDP interposer and KC705 evaluation board is common. The next steps should be followed to recreate the software project of the reference design:

Github Repository

  • From this entire repository you will use cf_sdp_kc705 folder. This is common for all KC705 projects.

EDK KC705 project

  • Open the Xilinx SDK. When the SDK starts, it asks you to provide a folder where to store the workspace. Any folder can be provided. Make sure that the path where it is located does not contain any spaces.
  • In the SDK select the File→Import menu option to import the software projects into the workspace.

Import Projects

  • In the Import window select the General→Existing Projects into Workspace option.

Existing Projects Import

  • In the Import Projects window select the cf_sdp_kc705 folder as root directory and check the Copy projects into workspace option. After the root directory is chosen the projects that reside in that directory will appear in the Projects list. Press Finish to finalize the import process.

Projects Import

  • The Project Explorer window now shows the projects that exist in the workspace without software files.

Project Explorer

  • Now the software must be added in your project. For downloading the software, you must use 3 links from Github given in Downloads section. From there you'll download the specific driver, the specific commands and the Xilinx Boards Common Drivers(which are commons for all Xilinx boards). All the software files downloaded must be copied in src folder from sw folder.

Project complete

  • Before compilation in the file called Communication.h you have to uncomment the name of the device that you currently use. In the picture below there is an example of this, which works only with AD5629R project. For another device, uncomment only the respective name. You can have one driver working on multiple devices, so the drivers's name and the uncommented name may not be the same for every project.

Communication.h

  • The SDK should automatically build the project and the Console window will display the result of the build. If the build is not done automatically, select the Project→Build Automatically menu option.
  • If the project was built without any errors, you can program the FPGA and run the software application.
13 Aug 2013 09:22 · Lucian Sin

More information

28 May 2012 15:18

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