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PCI2040 pdf datasheet (PCI-DSP
消耗积分:5 |
格式:rar |
大小:223 |
2009-02-17
张杰
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The TI PCI2040 is a PCI-DSP bridge that provides a glueless connection between the 8-bit host port interface (HPI)
port on the TMS320C54X or the 16-bit HPI port on TMS320C6X to the high performance PCI bus. It provides a PCI
bus target interface compliant with the PCI Local Bus Specification.
The PCI2040 provides several external interfaces: the PCI bus interface with compact PCI support, the HPI port
interface with support for up to four DSPs, a serial ROM interface, a general-purpose input/output interface (GPIOs),
and a 16-bit general-purpose bus to provide a glueless interface to TI JTAG test bus controller (TBC). The PCI2040
universal target-only PCI interface is compatible with 3.3-V or 5-V signaling environments.
The PCI2040 interfaces with DSPs via a data bus (HPI port). The PCI2040 also provides a serial ROM interface for
preloading several registers including the subsystem ID and subsystem vendor ID.
The PCI2040, compliant with the latest PCI Bus Power Management Interface Specification, provides several
low-power features that reduce power consumption. Furthermore, an advanced CMOS process achieves low system
power consumption.
Unused PCI2040 inputs must be pulled to a valid logic level using a pullup resistor.
port on the TMS320C54X or the 16-bit HPI port on TMS320C6X to the high performance PCI bus. It provides a PCI
bus target interface compliant with the PCI Local Bus Specification.
The PCI2040 provides several external interfaces: the PCI bus interface with compact PCI support, the HPI port
interface with support for up to four DSPs, a serial ROM interface, a general-purpose input/output interface (GPIOs),
and a 16-bit general-purpose bus to provide a glueless interface to TI JTAG test bus controller (TBC). The PCI2040
universal target-only PCI interface is compatible with 3.3-V or 5-V signaling environments.
The PCI2040 interfaces with DSPs via a data bus (HPI port). The PCI2040 also provides a serial ROM interface for
preloading several registers including the subsystem ID and subsystem vendor ID.
The PCI2040, compliant with the latest PCI Bus Power Management Interface Specification, provides several
low-power features that reduce power consumption. Furthermore, an advanced CMOS process achieves low system
power consumption.
Unused PCI2040 inputs must be pulled to a valid logic level using a pullup resistor.
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